- Accverinos series functional module
- Assuring 100 MHz speed data transfer (160 signal lines in parallel) between neighboring functional modules on Accverinos B-1. *1)
- FPGA: Xilinx XC2V6000-FF1152 (XC2V8000-FF1152 also available).
- Total 698 user I/Os.
- Contains two IDE connectors (each IDE has 32 user I/Os and a dedicated clock).
- FPGA function DCI (digitally controlled impedance) may be available.
- Design Gateway configuration supports: FlashLink.
- Sample FPGA circuit core-IP (Verilog: PCI and inter-connect test circuit between functional modules) and PC base software (Windows driver and application software) source code may be applied.

*1) Circuit testing conducted by Accverinos (source attached to product as sample).

· The signals connected to CN1 - CN4 can all be used by the user.
· Clock input can be freely selected from among input from the base system (33MHz), OSC on the module (50MHz), SMA input, input from another module (CN1 - CN4), etc.
· Clock can be provided non-skewed to the FPGA by the clock driver on the functional module.
· Input and output to the base system (PCI, LED, SW, etc.) can all be used.
· LEDs are mounted for debugging.

· PCI target function
· Function module connection test circuit
· Test pattern generating circuit for use in tests